DeepPractise
DeepPractise

Gate Errors

Track: Noise & Errors · Difficulty: Intermediate · Est: 12 min

Gate Errors

Overview

In the ideal circuit model, a gate like Rx(θ)R_x(\theta) rotates by exactly θ\theta every time. On real hardware, gates are implemented by control pulses (microwaves, lasers, voltages). Those controls are never perfectly calibrated and never perfectly stable.

Gate errors matter because quantum algorithms rely on many precise operations in sequence. A small per-gate error can accumulate into a large overall error as circuit depth grows.

This is one of the core NISQ limits:

  • even if T1T_1 and T2T_2 were infinite, imperfect gates would still cap performance

Intuition

Imperfect control

A physical gate is not an abstract matrix. It is “apply this pulse with this shape, at this frequency, for this long.” Any mismatch between the intended control and the actual control produces a slightly wrong operation.

Over-rotations and under-rotations

A common error type is a rotation that is too large or too small. For example:

  • you want Rx(π/2)R_x(\pi/2)
  • you actually apply Rx(π/2+ϵ)R_x(\pi/2 + \epsilon)

If ϵ\epsilon is consistent, it is a systematic error (calibration bias). If ϵ\epsilon varies randomly, it is a stochastic error (noise on the control).

Calibration drift

Even if you calibrate perfectly at 9:00 AM, parameters can drift:

  • temperature changes
  • electronics drift
  • device properties shift

So the “same gate” at 9:30 AM might not be exactly the same as at 9:00 AM.

Accumulation with circuit depth

Gate errors compound. If you apply one slightly wrong gate, maybe the state is still close to correct. After dozens or hundreds of gates, those small deviations can stack up.

This is why NISQ algorithms often focus on:

  • shallow circuits
  • error mitigation techniques
  • careful compilation to reduce depth

Formal Description

We’ll describe gate error at the level of “intended vs actual.”

Intended vs actual operation

Let UU be the intended unitary gate. A simple way to express a gate error is:

  • actual operation is close to UU, but not equal

Conceptually:

  • the state after the gate is not exactly UψU|\psi\rangle
  • it is something nearby, due to imperfect control and coupling to the environment during the gate

Systematic vs stochastic errors

  • Systematic: consistent bias (repeatable mis-rotation, wrong axis, constant crosstalk). These can sometimes be reduced by better calibration.

  • Stochastic: random fluctuations (pulse noise, fluctuating fields). These behave more like “noise per gate” and are harder to calibrate away completely.

Why depth is dangerous

Each gate has some chance of producing the wrong transformation. Even if each error is small, many gates can push the state far from the intended trajectory.

So performance depends not just on “how many qubits,” but also on:

  • how deep the circuit is
  • how error-prone each gate is

Worked Example

Suppose a device has an average single-qubit gate error rate of 0.1%. That means each gate is very close to ideal, but not perfect.

Now consider a circuit with 500 single-qubit gates. Even without doing precise probability math, it’s reasonable to expect:

  • many opportunities for small deviations
  • a noticeable drop in final accuracy

This is why two circuits that implement the same logical function can behave very differently:

  • a shallow circuit may work
  • a deep circuit may fail due to accumulated gate error

Turtle Tip

Turtle Tip

In NISQ, “can I run this algorithm?” often becomes “can I express it in a shallow enough circuit?” Gate error accumulation is one of the main reasons depth matters.

Common Pitfalls

Common Pitfalls
  • Treating all gate errors as random. Many important errors are systematic and show up as consistent biases.
  • Assuming a good average error rate guarantees success. A few especially noisy gates or too much depth can still break the circuit.
  • Forgetting two-qubit gates are usually much noisier than one-qubit gates, so circuit structure matters a lot.

Quick Check

Quick Check
  1. What is the difference between a systematic gate error and a stochastic gate error?
  2. Why does circuit depth amplify the impact of small per-gate errors?
  3. Give one example of a physical cause of gate error.

What’s Next

Gates can be imperfect even before you measure. Next we focus on the last step of most algorithms: readout errors, where measurement itself can report the wrong classical bit.